图书标签: SystemVerilog 集成电路 verification Verification 验证平台 计算机 系统硬件 Verilog
发表于2024-11-07
System Verilog for Verification pdf epub mobi txt 电子书 下载 2024
New! Expanded! Updated!
Based on the bestselling first edition this extensively revised second edition includes the relevant changes that apply to the 2008 version of the SystemVerilog Language Reference Manual (LRM). Significant changes include:
* The revision of nearly every explanation and code sample
* The inclusion of new chapters: "A Complete SystemVerilog Testbench" with a complete constrained random testbench for an ATM switch and "Interfacing with C" on the DPI (Directed Programming Interface)
* The addition of 70 new examples including larger ones such as a directed testbench at the end of chapter four
* An expanded index with 50% more entries and cross references
"As digital integrated circuits relentlessly march towards a billion transistors and beyond, Verilog testbenches are running out of steam. With logic verification taking more effort than design, moving to a higher level of abstraction is the only choice. SystemVerilog appears to be the winner in the high-level verification language market and "SystemVerilog for Verification" is the book that will take working professionals and students alike from basic Verilog to the sophisticated structures needed to verify large and complex designs."
Ronald W. Mehler, Professor of Electrical and Computer Engineering, California State University Northridge
"It can be difficult to improve upon a great book, but Chris has achieved that goal - the second edition of this book is even better than the first!
The explanations of abstract verification constructs are more detailed, and many more comprehensive examples make it easier to see how to apply SystemVerilog in object-oriented verification. The new chapter on the SystemVerilog Direct Programming Interface (DPI) is a very valuable addition. This second edition is a must-have book for every engineer involved in Verilog and SystemVerilog design and verification. The book serves well both as a general SystemVerilog reference and for learning object-oriented verification techniques. This book is such an invaluable reference, that my company includes a copy as part of the student training materials with every SystemVerilog verification course we teach!"
Stuart Sutherland, SystemVerilog Training Consultant, Sutherland HDL, Inc.
Chris Spear is a Verification Consultant for Synopsys, and has advised companies around the world on testbench methodology. He has trained hundreds of engineers on SystemVerilog’s verification constructs.
Testbenches are growing more complex. You need this book to keep up.
Includes nearly 500 code samples and 70 figures.
Written for:
Hardware and software engineers in electronic design
Keywords:
* Spear
* SystemVerilog
* methodology concepts
* testbenches
* verification
作者有点挫,废话太多
评分A good introduction to SystemVerilog for verification. Though this book date back to 2008 and many of the concepts seem obsolete, it's a must have for any verification engineer. For better reference, i would recommend the free web and IEEE1800-2017.
评分用systemverilog做验证的人必读。有软件OO知识(C++或JAVA)的人更容易上手。 可以做为参考手册,但是更多细节需要看标准。
评分作者有点挫,废话太多
评分用systemverilog做验证的人必读。有软件OO知识(C++或JAVA)的人更容易上手。 可以做为参考手册,但是更多细节需要看标准。
sv验证最好的入门书籍。关于面向对象的编程介绍的很好。建议直接看英文版的。这门书的网站上有源代码,可以一边看书,一边把代码运行一遍,理解起来会更容易。第十章是一个完整的验证平台的实现,对全书进行一次总结,如果可以仿照第十章的验证平台,自己写一些其他模块的验证...
评分sv验证最好的入门书籍。关于面向对象的编程介绍的很好。建议直接看英文版的。这门书的网站上有源代码,可以一边看书,一边把代码运行一遍,理解起来会更容易。第十章是一个完整的验证平台的实现,对全书进行一次总结,如果可以仿照第十章的验证平台,自己写一些其他模块的验证...
评分the best book of introducing verifcation using SV. It is worth taking a careful look. And you should run all the codes by yourself with VCS/NC/modelsim
评分To read this book, you should have basic knowledge of Verilog. There are many examples in this book, very easy to understand. It's an introduction book for SystemVerilog Verification. If you want learn the language in depth, go IEEE1800 or VMM. You should...
评分To read this book, you should have basic knowledge of Verilog. There are many examples in this book, very easy to understand. It's an introduction book for SystemVerilog Verification. If you want learn the language in depth, go IEEE1800 or VMM. You should...
System Verilog for Verification pdf epub mobi txt 电子书 下载 2024